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Data Transfer Instructions
Table 2.19 Data Transfer Instructions
Instruction
MOV
#imm,Rn
MOV.W
@(disp,PC),Rn
MOV.L
@(disp,PC),Rn
MOV
Rm,Rn
MOV.B
Rm,@Rn
MOV.W
Rm,@Rn
MOV.L
Rm,@Rn
MOV.B
@Rm,Rn
MOV.W
@Rm,Rn
MOV.L
@Rm,Rn
MOV.B
Rm,@–Rn
MOV.W
Rm,@–Rn
MOV.L
Rm,@–Rn
MOV.B
@Rm+,Rn
MOV.W
@Rm+,Rn
MOV.L
@Rm+,Rn
MOV.B
R0,@(disp,Rn)
MOV.W
R0,@(disp,Rn)
MOV.L
Rm,@(disp,Rn)
MOV.B
@(disp,Rm),R0
MOV.W
@(disp,Rm),R0
MOV.L
@(disp,Rm),Rn
MOV.B
Rm,@(R0,Rn)
MOV.W
Rm,@(R0,Rn)
Instruction Code
1110nnnniiiiiiii
1001nnnndddddddd
1101nnnndddddddd
0110nnnnmmmm0011
0010nnnnmmmm0000
0010nnnnmmmm0001
0010nnnnmmmm0010
0110nnnnmmmm0000
0110nnnnmmmm0001
0110nnnnmmmm0010
0010nnnnmmmm0100
0010nnnnmmmm0101
0010nnnnmmmm0110
0110nnnnmmmm0100
0110nnnnmmmm0101
0110nnnnmmmm0110
10000000nnnndddd
10000001nnnndddd
0001nnnnmmmmdddd
10000100mmmmdddd
10000101mmmmdddd
0101nnnnmmmmdddd
0000nnnnmmmm0100
0000nnnnmmmm0101
Operation
imm → Sign extension → Rn
(disp × 2 + PC) → Sign
extension → Rn
(disp × 4 + PC) → Rn
Rm → Rn
Rm → (Rn)
Rm → (Rn)
Rm → (Rn)
(Rm) → Sign extension → Rn
(Rm) → Sign extension → Rn
(Rm) → Rn
Rn–1 → Rn, Rm → (Rn)
Rn–2 → Rn, Rm → (Rn)
Rn–4 → Rn, Rm → (Rn)
(Rm) → Sign extension → Rn,
Rm + 1 → Rm
(Rm) → Sign extension → Rn,
Rm + 2 → Rm
(Rm) → Rn,Rm + 4 → Rm
R0 → (disp + Rn)
R0 → (disp × 2 + Rn)
Rm → (disp × 4 + Rn)
(disp + Rm) → Sign
extension → R0
(disp × 2 + Rm) → Sign
extension → R0
(disp × 4 + Rm) → Rn
Rm → (R0 + Rn)
Rm → (R0 + Rn)
Rev. 4.00 Sep. 14, 2005 Page 71 of 982
Section 2 CPU
Execution
States
T Bit
1
1
1
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
1
—
REJ09B0023-0400
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