Figure 20.5 Setup Stage Operation - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Setup Stage:
SETUP token reception
Receive 8-byte command
data in EP0s
Command
to be processed by
application?
Set setup command
reception complete flag
(USBIFR0/SETUP TS = 1)
To data stage
Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
USB function
Automatic
No
processing by
this module
Yes
Interrupt request

Figure 20.5 Setup Stage Operation

Section 20 USB Function Module
Application
Clear SETUP TS flag
(USBIFR0/SETUP TS = 0)
Clear EP0i FIFO (UFCLR/EP0iCLR = 1)
Clear EP0o FIFO (UFCLR/EP0oCLR = 1)
Read 8-byte data from EP0s
Decode command data
Determine data stage direction*
Write 1 to EP0s read complete bit
(USBTRG/EP0s RDFN = 1)
2
*
To control-in
To control-out
data stage
data stage
Rev. 4.00 Sep. 14, 2005 Page 769 of 982
1
REJ09B0023-0400

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