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Table 12.7 8-Bit External Device Access and Data Alignment
Operation
Byte access at 0
Byte access at 1
Byte access at 2
Byte access at 3
Word
1st time
access at 0
at 0
2nd time
at 1
Word
1st time
access at 2
at 2
2nd time
at 3
Longword
1st time
access at 0
at 0
2nd time
at 1
3rd time
at 2
4th time
at 3
Data Bus
D31 to
D23 to
D15 to
D24
D16
D8
Section 12 Bus State Controller (BSC)
WE3,
D7 to D0
DQMUU
Data
7 to 0
Data
7 to 0
Data
7 to 0
Data
7 to 0
Data
15 to 8
Data
7 to 0
Data
15 to 8
Data
7 to 0
Data
31 to 24
Data
23 to 16
Data
15 to 8
Data
7 to 0
Rev. 4.00 Sep. 14, 2005 Page 323 of 982
Strobe Signals
WE2,
WE1,
DQMUL
DQMLU
REJ09B0023-0400
WE0,
DQMLL
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
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