Address Map; Table 12.2 Address Space Map 1 (Cmncr.map = 0) - Renesas HD6417641 Hardware Manual

12.3.3

Address Map

The external address space has a capacity of 384 Mbytes and is used by dividing 8 partial spaces.
The kind of memory to be connected and the data bus width are specified in each partial space.
The address map for the external address space is listed below.

Table 12.2 Address Space Map 1 (CMNCR.MAP = 0)

Physical Address
H'00000000 to H'03FFFFFF
H'04000000 to H'07FFFFFF
H'08000000 to H'0BFFFFFF
H'0C000000 to H'0FFFFFFF
H'10000000 to H'13FFFFFF
H'14000000 to H'15FFFFFF
H'16000000 to H'17FFFFFF
H'18000000 to H'19FFFFFF
H'1A000000 to H'1BFFFFFF
H'1C000000 to H'1FFFFFFF
Notes: 1. Do not access the reserved area. If the reserved area is accessed, the correct
operation cannot be guaranteed.
2. Access the address indicated in section 24, List of Registers, for the on-chip I/O register
in area 1. Do not access area 1 addresses which are not described in the register map.
Otherwise, the correct operation cannot be guaranteed.
Area Memory to be Connected
Area 0 Normal memory
Burst ROM (asynchronous)
Burst ROM (synchronous)
Area 1 Internal I/O register area*
Area 2 Normal memory
Byte-selection SRAM
SDRAM
Area 3 Normal memory
Byte-selection SRAM
SDRAM
Area 4 Normal memory
Byte-selection SRAM
Burst ROM (asynchronous)
Area 5A Normal memory
Area 5B Normal memory
Byte-selection SRAM
MPX-I/O
Area 6A Normal memory
Area 6B Normal memory
Byte-selection SRAM
MPX-I/O
Area 7 Reserved*
Section 12 Bus State Controller (BSC)
2
1
Rev. 4.00 Sep. 14, 2005 Page 275 of 982
Capacity
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
64 Mbytes
32 Mbytes
32 Mbytes
32 Mbytes
32 Mbytes
64 Mbytes
REJ09B0023-0400