Figure 2.10 Data Formats - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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DSP type fixed point
With guard bits
Without guard bits
Multiplier input
DSP type integer
With guard bits
Without guard bits
Shift amount for
arithmetic shift (PSHA)
Shift amount for
logical shift (PSHL)
DSP type logical
CPU type integer
Longword
S: Sign bit
The shift amount for the arithmetic shift (PSHA) instruction has a 7-bit field that can represent
values from –64 to +63, but –32 to +32 are valid numbers for the instruction. Also the shift
amount for a logical shift operation has a 6-bit field, but –16 to +16 are valid numbers for the
instruction.
39
31 30
S
31 30
S
39
31 30
S
39
32 31
S
31
S
31
31
39
31
31
S
: Binary point

Figure 2.10 Data Formats

16 15
16 15
16 15
22
16 15
S
21
16 15
S
16 15
: Does not affect the operations
Rev. 4.00 Sep. 14, 2005 Page 43 of 982
Section 2 CPU
0
8
8
–31
–2
to +2
– 2
0
–31
–1 to +1 – 2
0
–15
–1 to +1 – 2
0
23
23
–2
to +2
– 1
0
15
15
–2
to +2
– 1
0
–32 to +32
0
–16 to +16
0
0
31
31
–2
to +2
– 1
REJ09B0023-0400

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