Standby Control Register 4 (Stbcr4) - Renesas HD6417641 Hardware Manual

Section 6 Power-Down Modes
6.2.4

Standby Control Register 4 (STBCR4)

STBCR4 is a readable/writable 8-bit register used to select whether or not individual modules
operate in power-down mode. STBCR4 is initialized (to H'00) by a power-on reset, but retains its
previous value after a manual reset or a period in the standby mode. Only byte access is valid.
Bit Bit Name

7
6 MSTP46
5 MSTP45
4 MSTP44
3 MSTP43
2 MSTP42

1, 0
Rev. 4.00 Sep. 14, 2005 Page 170 of 982
REJ09B0023-0400
Initial
Value R/W Description
0 R Reserved
This bit is always read as 0. The write value should
always be 0.
0 R/W Module Stop 46
0: The USB module stops.
1: Supply of the clock to the USB is started.
0 R/W Module Stop 45
When the MSTP45 bit is set to 1, supply of the clock
to the MTU stops.
0: The MTU runs.
1: Supply of the clock to the MTU stops.
0 R/W Module Stop 44
When the MSTP44 bit is set to 1, supply of the clock
to the POE stops.
0: The POE runs.
1: Supply of the clock to the POE stops.
0 R/W Module Stop 43
When the MSTP43 bit is set to 1, supply of the clock
to the CMT1 stops.
0: The CMT1 runs.
1: Supply of the clock to the CMT1 stops.
0 R/W Module Stop 42
When the MSTP42 bit is set to 1, supply of the clock
to the IIC2 stops.
0: The IIC2 runs.
1: Supply of the clock to the IIC2 stops.
All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.