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The correspondence between DSP data transfer operands and registers is shown in table 2.28.
CPU core registers are used as a pointer address that indicates a memory address.
Table 2.28 Correspondence between DSP Data Transfer Operands and Registers
Register
CPU
R0
registers R1
R2 (As2)
R3 (As3)
R4 (Ax0)
R5 (Ax1)
R6 (Ay0)
R7 (Ay1)
R8 (Ix)
R9 (Iy)
DSP
A0
registers A1
M0
M1
X0
X1
Y0
Y1
A0G
A1G
Ax
Ix
Dx
Yes
Yes
Yes
—
—
—
—
—
Yes
Yes
Ay
Iy
Dy
—
—
Yes
Yes
Yes
—
—
Yes
Yes
Rev. 4.00 Sep. 14, 2005 Page 87 of 982
Section 2 CPU
Da
As
Ds
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
REJ09B0023-0400
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