Block Diagram; Figure 21.1 Block Diagram Of A/D Converter - Renesas HD6417641 Hardware Manual

Section 21 A/D Converter
21.1.1

Block Diagram

Figure 21.1 shows a block diagram of the A/D converter.
AVcc and AVss for both A/D modules are common pins in the chip.
A/D converter 0
AV
CC
AV
SS
AN0
AN1
Analog
multi
AN2
plecer
AN3
A/D converter 1
AV
CC
AV
SS
AN4
AN5
Analog
multi
AN6
plecer
AN7
[Legend]
ADCSR 0:
ADDRA 0:
ADDRB 0:
ADDRC 0:
ADDRD 0:
ADCR:
Rev. 4.00 Sep. 14, 2005 Page 798 of 982
REJ09B0023-0400
Peripheral data bus
10 bit
A/D
+
–
Comparator
Sample and-
hold circuit
Peripheral data bus
10 bit
A/D
+
–
Comparator
Sample and-
hold circuit
A/D 0 control/status register
A/D 0 data register A
A/D 0 data register B
A/D 0 data register C
A/D 0 data register D
A/D0, A/D1 control register

Figure 21.1 Block Diagram of A/D Converter

Internal
data bus
Control circuit
Internal
data bus
Control circuit
ADCSR 1: A/D 1 control/status register
ADDRA 1: A/D 1 data register A
ADDRB 1: A/D 1 data register B
ADDRC 1: A/D 1 data register C
ADDRD 1: A/D 1 data register D
MTU
trigger
ADI0
interrupt
signal
ADCR
ADI1
interrupt
signal