Table 18.28 Output Level Select Function - Renesas HD6417641 Hardware Manual

Section 18 Multi-Function Timer Pulse Unit (MTU)
Bit Bit Name
3 FB
2 WF
1 VF
0 UF

Table 18.28 Output level Select Function

Bit 2 Bit 1 Bit 0
WF VF UF
0 0 0
1
1 0
1
1 0 0
1
1 0
1
Rev. 4.00 Sep. 14, 2005 Page 560 of 982
REJ09B0023-0400
Initial
value R/W Description
0 R/W External Feedback Signal Enable
This bit selects whether the switching of the output of
the positive/reverse phase is carried out automatically
with the MTU/channel 0 TGRA, TGRB, TGRC input
capture signals or by writing 0 or 1 to bits 2 to 0 in
TGCR.
0: Output switching is carried out by external input
1: Output switching is carried out by software (TGCR's
0 R/W Output Phase Switch 2 to 0
0 R/W These bits set the positive phase/negative phase
output phase on or off state. The setting of these bits
0 R/W
is valid only when the FB bit in this register is set to 1.
In this case, the setting of bits 2 to 0 is a substitute for
external input. See table 18.28.
TIOC3B TIOC4A
U Phase V Phase
OFF OFF
ON OFF
OFF ON
OFF ON
OFF OFF
ON OFF
OFF OFF
OFF OFF
(Input sources are channel 0 TGRA, TGRB, TGRC
input capture signal)
UF, VF, WF settings).
Function
TIOC4B TIOC3D
W Phase U Phase
OFF OFF
OFF OFF
OFF ON
OFF OFF
ON OFF
OFF OFF
ON ON
OFF OFF
TIOC4C TIOC4D
V Phase W Phase
OFF OFF
OFF ON
OFF OFF
OFF ON
ON OFF
ON OFF
OFF OFF
OFF OFF