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• TIORL_0, TIORL_3, TIORL_4
Bit
Bit Name
7
IOD3
6
IOD2
5
IOD1
4
IOD0
3
IOC3
2
IOC2
1
IOC1
0
IOC0
Initial
value
R/W
Description
0
R/W
I/O Control D3 to D0
0
R/W
Specify the function of TGRD.
0
R/W
When TGRD is used as the buffer register of TGRB,
this setting is disabled, and input capture/output
0
R/W
compare does not occur.
See the following tables.
TIORL_0: Table 18.11
TIORL_3: Table 18.15
TIORL_4: Table 18.17
0
R/W
I/O Control C3 to C0
0
R/W
Specify the function of TGRC.
0
R/W
When TGRC is used as the buffer register of TGRA,
this setting is disabled, and input capture/output
0
R/W
compare does not occur.
See the following tables.
TIORL_0: Table 18.19
TIORL_3: Table 18.23
TIORL_4: Table 18.25
Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 531 of 982
REJ09B0023-0400
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