Renesas HD6417641 Hardware Manual page 144

Section 2 CPU
Instruction
PDEC Sy,Dz
DCT PDEC Sx,Dz
DCT PDEC Sy,Dz
DCF PDEC Sx,Dz
DCF PDEC Sy,Dz
PCLR Dz
DCT PCLR Dz
DCF PCLR Dz
PSHA #imm,Dz
PSHL #imm,Dz
PSTS MACH,Dz
DCT PSTS MACH,Dz
DCF PSTS MACH,Dz
PSTS MACL,Dz
Rev. 4.00 Sep. 14, 2005 Page 94 of 982
REJ09B0023-0400
Instruction Code
111110**********
1010100100yyzzzz
111110**********
10001010xx00zzzz
111110**********
1010101000yyzzzz
111110**********
10001011xx00zzzz
111110**********
1010101100yyzzzz
111110**********
100011010000zzzz
111110**********
100011100000zzzz
111110**********
100011110000zzzz
111110**********
00010iiiiiiizzzz
111110**********
00000iiiiiiizzzz
111110**********
110011010000zzzz
111110**********
110011100000zzzz
111110**********
110011110000zzzz
111110**********
110111010000zzzz
Operation
Sy [31:16] – 1 → Dz
If DC = 1, Sx [39:16] – 1
→ Dz
If DC = 0, nop
If DC = 1, Sy [31:16] – 1
→ Dz
If DC = 0, nop
If DC = 0, Sx [39:16] – 1
→ Dz
If DC = 1, nop
If DC = 0, Sy [31:16] – 1
→ Dz
If DC = 1, nop
h'00000000 → Dz
If DC = 1, h'00000000 → Dz
If DC = 0, nop
If DC = 0, h'00000000 → Dz
If DC = 1, nop
If imm > = 0, Dz << imm
→ Dz (arithmetic shift)
If imm<0, Dz>>imm → Dz
If imm > = 0, Dz << imm
→ Dz (logical shift)
If imm < 0, Dz >> imm → Dz
MACH → Dz
If DC = 1, MACH → Dz
If DC = 0, MACH → Dz
MACL → Dz
Execution
States DC
1 *

1

1

1

1
1
*

1

1
1
*
1 *

1

1

1

1