Figure 25.15 Basic Bus Timing For Normal Space (One Cycle Of Externally Input/Waitsel = 0) - Renesas HD6417641 Hardware Manual

CKIO
A25 to A0
CSn
RD/WR
RD
Read
D31 to D0
WEn
Write
D31 to D0
BS
DACKn*
WAIT
Note: * Waveform for DACKn when active low is selected.
Figure 25.15 Basic Bus Timing for Normal Space
(One Cycle of Externally Input/WAITSEL = 0)
T1 TwX
t
AD1
t
AS
t
CSD1
t
RWD1
t
RSD
t
WED1
t
WDD1
t t
BSD BSD
t
DACD
t t
WTH1 WTH1
t t
WTS1 WTS1
Section 25 Electrical Characteristics
T2
t
AD1
t
CSD1
t
RWD1
t t
RSD AH
t
RDH1
t
RDS1
t t
WED1 AH
t
WDH1
t
DACD
Rev. 4.00 Sep. 14, 2005 Page 927 of 982
REJ09B0023-0400