Figure 3.22 Load/Store Control For X And Y Data-Transfer Instructions - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 3 DSP Operation
Instruction code for X
data-transfer operation
Input/output
control for
Control
DSP data
for X memory
registers
X0/X1, A0/A1
X_MEM and Y_MEM:
Select X and Y data memory

Figure 3.22 Load/Store Control for X and Y Data-Transfer Instructions

Control for X Memory:
if ( !Nop ) {
X_MEM=1; XAB=ABx;
if ( load operation ) {
Dx[31:16]=XDB;
Dx[15:0]=0x0000;
}
else XDB = Dx[31:16];
}
else { X_MEM=0; XAB=0x000; }
The conditional execution based on the DC flag in DSR cannot control any MOVX/MOVY
instructions.
Rev. 4.00 Sep. 14, 2005 Page 140 of 982
REJ09B0023-0400
31
R4 [Ax]
R5 [Ax]
15
1
ABx
XAB 16-bit
YAB 16-bit
X_MEM
X data
X R/W
memory
4 kbytes
16-bit
XDB
YDB
16-bit
/* Dx is X0 or X1 */
/* Dx is A0 or A1 */
0
31
0
R6 [Ay]
Instruction code for Y
data-transfer operation
R7 [Ay]
15
1
ABy
Y_MEM
Y data
Y R/W
memory
4 kbytes
Input/output
control for
Control
DSP data
for Y memory
registers
Y0/Y1, A0/A1

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