Port J; Register Description; Figure 23.10 Port J; Table 23.11 Port H Data Register (Phdr) Read/Write Operations - Renesas HD6417641 Hardware Manual

Section 23 I/O Ports

Table 23.11 Port H Data Register (PHDR) Read/Write Operations

PHnMD2 PHnMD1 Pin State
0 0
1
1 0
1
(n = 0 to 14)
23.9

Port J

Port J is a 13-bit input/output port with the pin configuration shown in figure 23.10. Each pin is
controlled by the port J control register (PJCR) in the PFC.
23.9.1

Register Description

Port J has the following register.
• Port J data register (PJDR)
Rev. 4.00 Sep. 14, 2005 Page 862 of 982
REJ09B0023-0400
Read
Input Pin state
Output PHDR value Data is written to PHDR and the value is

Reserved
Other functions Pin state
Port J

Figure 23.10 Port J

Write
Data is written to PHDR, but does not affect
pin state.
output from the pin.

Data is written to PHDR, but does not affect
pin state.
PTJ12 (input/output)/AUDSYNC (output)
PTJ11 (input/output)/AUDATA3 (output)
PTJ10 (input/output)/AUDATA2 (output)
PTJ9 (input/output)/AUDATA1 (output)
PTJ8 (input/output)/AUDATA0 (output)
PTJ7 (input/output)/IRQ7 (input)
PTJ6 (input/output)/IRQ6 (input)
PTJ5 (input/output)/IRQ5 (input)
PTJ4 (input/output)/IRQ4 (input)
PTJ3 (input/output)/IRQ3 (input)
PTJ2 (input/output)/IRQ2 (input)
PTJ1 (input/output)/IRQ1 (input)
PTJ0 (input/output)/IRQ0 (input)