Renesas HD6417641 Hardware Manual page 535

32-bit risc microcomputer superh risc engine family / sh7641 series
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Bit
Bit Name
4
NACKF
3
STOP
2
AL/OVE
Initial
Value
R/W
Description
0
R/W
No Acknowledge Detection Flag
[Setting condition]
[Clearing condition]
0
R/W
Stop Condition Detection Flag
[Setting condition]
[Clearing condition]
0
R/W
Arbitration Lost Flag/Overrun Error Flag
This flag indicates that arbitration was lost in master
mode with the I
been received while RDRF = 1 with the clocked
synchronous format.
When two or more master devices attempt to seize the
bus at nearly the same time, if the I
detects data differing from the data it sent, it sets AL to
1 to indicate that the bus has been taken by another
master.
[Setting conditions]
[Clearing condition]
Section 16 I
When no acknowledge is detected from the receive
device in transmission while the ACKE bit in ICIER
is 1
When 0 is written in NACKF after reading NACKF
= 1
When a stop condition is detected after frame
transfer
When 0 is written in STOP after reading STOP = 1
2
C bus format and that the final bit has
If the internal SDA and SDA pin disagree at the rise
of SCL in master transmit mode
When the SDA pin outputs high in master mode
while a start condition is detected
When the final bit is received with the clocked
synchronous format while RDRF = 1
When 0 is written in AL/OVE after reading AL/OVE
= 1
Rev. 4.00 Sep. 14, 2005 Page 485 of 982
2
C Bus Interface 2 (IIC2)
2
C bus interface
REJ09B0023-0400

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