Renesas HD6417641 Hardware Manual page 262

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 9 Exception Handling
• Example 3: Repeat loop consisting of two instructions
LDRS
RptDtct + 6
LDRS
RptDtct + 4
SETRCT #4
RptDtct: RptDtct
RptStart:
RptDtct1
RptEnd:
RptDtct3
InstrNext
• Example 4: Repeat loop consisting of one instruction
LDRS
RptDtct + 8
LDRS
RptDtct + 4
SETRCT #4
RptDtct: RptDtct
RptStart:
RptEnd:
RptDtct1
SPC Saved by an Exception in Repeat Control Period: If an exception is accepted in the repeat
control period while the repeat counter (RC11 to RC0) in the SR register is two or greater, the
program counter to be saved may not indicate the value to be returned correctly. To execute the
repeat control after returning from an exception processing, the return address must indicate an
instruction prior to a repeat detection instruction. Accordingly, if an exception is accepted in
repeat control period, an exception other than re-execution type exception by a repeat detection
instruction cannot return to the repeat control correctly.
Rev. 4.00 Sep. 14, 2005 Page 212 of 982
REJ09B0023-0400
; [A]
; [A]
; [A]
; [B] A repeat detection instruction is an
; [C1][Repeat start instruction]
; [C2][Repeat end instruction]
; [A]
; [A]
; [A]
; [A]
; [B] A repeat detection instruction is an
; [C1][Repeat start instruction]== [Repeat end
InstrNext ; [A]
instruction prior to a repeat start
instruction
instruction prior to a repeat start
instruction
instruction]

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