Table 18.7 Tpsc0 To Tpsc2 (Channel 2); Table 18.8 Tpsc0 To Tpsc2 (Channels 3 And 4) - Renesas HD6417641 Hardware Manual

Table 18.7 TPSC0 to TPSC2 (Channel 2)

Bit 2
Channel TPSC2
2 0
1
Note: This setting is ignored when channel 2 is in phase counting mode.

Table 18.8 TPSC0 to TPSC2 (Channels 3 and 4)

Bit 2
Channel TPSC2
3, 4 0
1
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Section 18 Multi-Function Timer Pulse Unit (MTU)
Description
Internal clock: counts on Pφ/1
Internal clock: counts on Pφ/4
Internal clock: counts on Pφ/16
Internal clock: counts on Pφ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
Internal clock: counts on Pφ/1024
Description
Internal clock: counts on Pφ/1
Internal clock: counts on Pφ/4
Internal clock: counts on Pφ/16
Internal clock: counts on Pφ/64
Internal clock: counts on Pφ/256
Internal clock: counts on Pφ/1024
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Rev. 4.00 Sep. 14, 2005 Page 527 of 982
REJ09B0023-0400