Renesas HD6417641 Hardware Manual page 72

Section 1 Overview
Classification
Multi function timer-
pulse unit (MTU)
Port output enable
(POE)
Serial
communication
interface with FIFO
(SCIF)
Rev. 4.00 Sep. 14, 2005 Page 22 of 828
REJ09B0023-0400
Symbol I/O
TCLKA I
TCLKB
TCLKC
TCLKD
TIOC0A I/O
TIOC0B
TIOC0C
TIOC0D
TIOC1A I/O
TIOC1B
TIOC2A I/O
TIOC2B
TIOC3A I/O
TIOC3B
TIOC3C
TIOC3D
TIOC4A I/O
TIOC4B
TIOC4C
TIOC4D
POE3 to
I
POE0
SCK0 I/O
SCK1
SCK2
RxD0 I
RxD1
RxD2
TxD0 O
TxD1
TxD2
RTS0
I/O
RTS1
RTS2
CTS0
I/O
CTS1
CTS2
Name Function
Clock input External clock input pins
Input capture/ The TGRA_0 to TGRD_0 input
output compare capture input/output compare
match output/PWM output pins.
Input capture/ The TGRA_1 to TGRB_1 input
output compare capture input/output compare
match output/PWM output pins.
Input capture/ The TGRA_2 to TGRB_2 input
output compare capture input/output compare
match output/PWM output pins.
Input capture/ The TGRA_3 to TGRD_3 input
output compare capture input/output compare
match output/PWM output pins.
Input capture/ The TGRA_4 to TGRB_4 input
output compare capture input/output compare
output/PWM output pins
Port output Request signal input to set the high
enable current pins to the high impedance
status
Serial clock Clock input/output pins
Received data Data input pins
Transmitted data Data output pins
Request to send Request to send
Clear to send Clear to send