Port B Data Register (Pbdr); Table 23.2 Port B Data Register (Pbdr) Read/Write Operations - Renesas HD6417641 Hardware Manual

Section 23 I/O Ports
23.2.2

Port B Data Register (PBDR)

PBDR is a 9-bit readable/writable register with seven reserved bits that stores data for pins PTB8
to PTB0. PBDR is initialized to H'0000 by a power-on reset, but it retains its previous value by a
manual reset, in standby mode, or in sleep mode.
Bit Bit Name

15 to 9
7 PB7DT
6 PB6DT
5 PB5DT
4 PB4DT
3 PB3DT
2 PB2DT
1 PB1DT
0 PB0DT

Table 23.2 Port B Data Register (PBDR) Read/Write Operations

PBnMD2 PBnMD1 Pin State
0 0
1
1 0
1
(n = 0 to 8)
Rev. 4.00 Sep. 14, 2005 Page 846 of 982
REJ09B0023-0400
Initial
Value R/W Description
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
0 R/W Bits PB8DT to PB0DT correspond to pins PTB8 to
PTB0. When the pin function is general output port, the
0 R/W
value of the corresponding bit in PBDR is returned
0 R/W
directly by reading the port. When the function is
general input port, the corresponding pin level is read
0 R/W
by reading the port. Table 23.2 shows the function of
0 R/W
PBDR.
0 R/W
0 R/W
0 R/W
Read
Input Pin state
Output PBDR value

Reserved
Other functions Pin state
Write
Data is written to PBDR, but does not affect
pin state.
Data is written to PBDR and the value is
output from the pin.

Data is written to PBDR, but does not affect
pin state.