Operand Conflict; Table 3.14 Correspondence Between Operands And Registers - Renesas HD6417641 Hardware Manual

3.1.11

Operand Conflict

When an identical destination operand is specified with multiple parallel instructions, data conflict
occurs. Table 3.14 shows the correspondence between each operand and registers.

Table 3.14 Correspondence between Operands and Registers

Ax
DSP A0
Registers
A1
M0
M1
X0
X1
Y0
Y1
Notes: 1. Registers available for operands
2. Registers available for operands (when there is operand conflict)
There are three cases of operand conflict problems.
1. When ALU and multiply instructions specify the same destination operand (Du and Dg)
2. When X-memory load and ALU instructions specify the same destination operand (Dx, Du,
and Dz)
3. When Y-memory load and ALU instructions specify the same destination operand (Dy, Du,
and Dz)
In these cases above, the result is not guaranteed.
X-Memory Y-Memory
Load Load
Ix Dx Ay Iy
2
*
2
*
6-Instruction
ALU
Dy Sx Sy Du
1 2
* *
1 2
* *
1
*
1
*
1 2
* *
1
*
2 1 2
* * *
2 1
* *
Rev. 4.00 Sep. 14, 2005 Page 123 of 982
Section 3 DSP Operation
3-Instruction 3-Instruction
Multiply
Se Sf Dg Sx
2 1
* *
1 1 2 1
* * * *
1
*
1
*
1 1 1
* * *
1 1
* *
1 1
* *
1
*
REJ09B0023-0400
ALU
Sy Dz
1
*
1
*
1 1
* *
1 1
* *
2
*
2
*
1 2
* *
1 2
* *