Table 3.1 Variation Of Alu Fixed-Point Operations; Table 3.2 Correspondence Between Operands And Registers - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 3 DSP Operation
Table 3.1
Variation of ALU Fixed-Point Operations
Mnemonic
Function
PADD
Addition
PSUB
Subtraction
PADDC
Addition with carry
PSUBC
Subtraction with borrow
PCMP
Comparison
PCOPY
Data copy
PABS
Absolute
PNEG
Negation
PCLR
Clear
Table 3.2
Correspondence between Operands and Registers
Register
Sx
A0
Yes
A1
Yes
M0
M1
X0
Yes
X1
Yes
Y0
Y1
As shown in figure 3.2, data loaded from the memory at the MA stage, which is programmed at
the same line as the ALU operation, is not used as a source operand for this operation, even
though the destination operand of the data load operation is identical to the source operand of the
ALU operation. In this case, previous operation results are used as the source operands for the
ALU operation, and then updated as the destination operand of the data load operation.
Rev. 4.00 Sep. 14, 2005 Page 100 of 982
REJ09B0023-0400
Source 1
Sx
Sx
Sx
Sx
Sx
Sx
All 0
Sx
All 0
Sx
All 0
All 0
Sy
Dz
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Source 2
Destination
Sy
Dz (Du)
Sy
Dz (Du)
Sy
Dz
Sy
Dz
Sy
All 0
Dz
Sy
Dz
All 0
Dz
Sy
Dz
All 0
Dz
Sy
Dz
All 0
Dz
Du
Yes
Yes
Yes
Yes

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