Boundary Scan Register (Sdbsr); Table 15.2 H-Udi Commands - Renesas HD6417641 Hardware Manual

Section 15 User Debugging Interface (H-UDI)

Table 15.2 H-UDI Commands

TI7 TI6 TI5
0 0 0
0 0 1
0 0 1
0 1 0
0 1 1
0 1 1
1 0 1
1 1 1
1 1 1
Other than the above
15.3.3

Boundary Scan Register (SDBSR)

SDBSR is a 469-bit shift register, located on the PAD, for controlling the input/output pins of this
LSI.
Using the EXTEST, SAMPLE/PRELOAD, CLAMP, and HIGHZ commands, a boundary scan
test conforming to the JTAG standard can be carried out. Table 15.3 shows the correspondence
between this LSI's pins and boundary scan register bits.
Rev. 4.00 Sep. 14, 2005 Page 458 of 982
REJ09B0023-0400
Bits 15 to 8
TI4 TI3 TI2
0 — —
0 — —
1 — —
0 — —
0 — —
1 — —
— — —
0 — —
1 — —
TI1 TI0 Description
— — JTAG EXTEST
— — JTAG CLAMP
— — JTAG HIGHZ
— — JTAG SAMPLE/PRELOAD
— — H-UDI reset negate
— — H-UDI reset assert
— — H-UDI interrupt
— — JTAG IDCODE (Initial value)
— — JTAG BYPASS
Reserved