Renesas HD6417641 Hardware Manual page 71

Classification
Direct memory
access controller
(DMAC)
User debugging
interface
(H-UDI)
Advanced user
debugger
(AUD)
E10A interface
2
I C bus interface 2
Symbol I/O
DREQ0,
I
DREQ1
DACK0,
O
DACK1
TEND0
O
TCK I
TMS I
TDI I
TDO O
TRST
I
AUDATA3 to O
AUDATA0
AUDCK O
AUDSYNC
O
ASEBRKAK
O
ASEMD0
I
SCL I/O
SDA I/O
Name Function
DMA-transfer Input pin for external requests for
request DMA transfer.
DMA-transfer Output pin for request receive, in
request receive response to external requests for
DMA transfer.
DMA-transfer end Output pin for DMA transfer end
output signal
Test clock Test-clock input pin.
Test mode select Inputs the test-mode select signal.
Test data input Serial input pin for instructions and
data.
Test data Serial output pin for instructions and
output data.
Test reset Initialization-signal input pin.
AUD data Data output pins in AUD-trace mode.
AUD clock Sync-clock output pin in AUD-trace
mode.
AUD sync Data start-position acknowledge-
signal signal output pin in AIUD-trace
mode.
Break mode Indicates that the E10A emulator has
acknowledge entered its break mode.
For the connection with the E10A,
see the SH7641 E10A Emulator
User's Manual (tentative title).
ASE mode Sets the ASE mode.
Serial clock pin Serial clock input/output pin
Serial data pin Serial data input/output pin
Rev. 4.00 Sep. 14, 2005 Page 21 of 982
Section 1 Overview
REJ09B0023-0400