Figure 18.88 Error Occurrence In Normal Mode, Recovery In Phase Counting Mode - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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(4)
Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Phase Counting Mode
Figure 18.88 shows an explanatory diagram of the case where an error occurs in normal mode and
operation is restarted in phase counting mode after re-setting.
1
RESET
TMDR
(normal)
MTU module
output
TIOC*A
TIOC*B
Port output
TIOC*A/PTE[n]
TIOC*B/PTE[n]
n = 0 to 15

Figure 18.88 Error Occurrence in Normal Mode, Recovery in Phase Counting Mode

1 to 10 are the same as in figure 18.85.
11. Set phase counting mode.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Note: Phase counting mode can only be set for channels 1 and 2, and therefore TOER setting is
not necessary.
2
3
4
5
6
TOER
TIOR
PFC
TSTR
(1)
(1 init
(MTU)
(1)
0 out)
High-Z
High-Z
Section 18 Multi-Function Timer Pulse Unit (MTU)
7
8
9
10
Match
Error
PFC
TSTR
TMDR
occurs
(PORT)
(0)
(PCM)
Rev. 4.00 Sep. 14, 2005 Page 647 of 982
11
12
13
14
TIOR
PFC
TSTR
(1 init
(MTU)
(1)
0 out)
REJ09B0023-0400

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