Renesas HD6417641 Hardware Manual page 533

Bit Bit Name
3 STIE
2 ACKE
1 ACKBR
0 ACKBT
Initial
Value R/W Description
0 R/W Stop Condition Detection Interrupt Enable
This bit enables or disables the stop condition (STPI)
when the STOP bit in ICSR is set .
0: Stop condition detection interrupt request (STPI) is
disabled.
1: Stop condition detection interrupt request (STPI) is
enabled.
0 R/W Acknowledge Bit Judgment Select
0: The value of the receive acknowledge bit is ignored,
and continuous transfer is performed.
1: If the receive acknowledge bit is 1, continuous
transfer is halted.
0 R Receive Acknowledge
In transmit mode, this bit stores the acknowledge data
that are returned by the receive device. This bit cannot
be modified. This bit can be canceled by clearing the
BBSY bit in ICCR2 to 1.
0: Receive acknowledge = 0
1: Receive acknowledge = 1
0 R/W Transmit Acknowledge
In receive mode, this bit specifies the bit to be sent at
the acknowledge timing.
0: 0 is sent at the acknowledge timing.
1: 1 is sent at the acknowledge timing.
2
Section 16 I C Bus Interface 2 (IIC2)
Rev. 4.00 Sep. 14, 2005 Page 483 of 982
REJ09B0023-0400