Table 12.6 16-Bit External Device Access And Data Alignment - Renesas HD6417641 Hardware Manual

Section 12 Bus State Controller (BSC)

Table 12.6 16-Bit External Device Access and Data Alignment

Operation
Byte access at 0
Byte access at 1
Byte access at 2
Byte access at 3
Word access at 0
Word access at 2
Longword 1st
access at 0 time at 0
2nd
time at 2
Rev. 4.00 Sep. 14, 2005 Page 322 of 982
REJ09B0023-0400
Data Bus
D31 to D23 to D15 to
D24 D16 D8
 
Data
7 to 0
  
 
Data
7 to 0
  
 
Data
15 to 8
 
Data
15 to 8
 
Data
31 to 24
 
Data
15 to 8
WE3,
D7 to D0 DQMUU
 

Data
7 to 0
 

Data
7 to 0

Data
7 to 0

Data
7 to 0

Data
23 to 16

Data
7 to 0
Strobe Signals
WE2, WE1,
DQMUL DQMLU

Assert
 

Assert
 

Assert

Assert

Assert

Assert
WE0,
DQMLL

Assert

Assert
Assert
Assert
Assert
Assert