Renesas HD6417641 Hardware Manual page 601

Bit Bit Name
4 TCFV
3 TGFD
Initial
value R/W Description
0 R/(W) Overflow Flag
Status flag that indicates that TCNT overflow has
occurred. Only 0 can be written, for flag clearing.
[Setting conditions]
•
•
[Clearing condition]
•
0 R/(W) Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channels 0, 3, and 4. Only
0 can be written, for flag clearing. In channels 1 and 2,
bit 3 is reserved. It is always read as 0, and should only
be written with 0.
[Setting conditions]
•
•
[Clearing condition]
•
Section 18 Multi-Function Timer Pulse Unit (MTU)
When the TCNT value overflows (changes from
H'FFFF to H'0000 )
In channel 4, when TCNT_4 is underflowed (H'0001
→ H'0000) in complementary PWM mode.
When 0 is written to TCFV after reading TCFV = 1
When TCNT = TGRD and TGRD is functioning as
output compare register
When TCNT value is transferred to TGRD by input
capture signal and TGRD is functioning as input
capture register
When 0 is written to TGFD after reading TGFD = 1
Rev. 4.00 Sep. 14, 2005 Page 551 of 982
REJ09B0023-0400