Figure 16.15 Receive Mode Operation Timing; Figure 16.16 Operation Timing For Receiving One Byte - Renesas HD6417641 Hardware Manual

2
Section 16 I C Bus Interface 2 (IIC2)
SCL
SDA
(Input)
MST
TRS
RDRF
ICDRS
ICDRR
User
[2] Set MST
processing
(when outputting the clock)
SCL
SDA
(Input)
MST
RCVD
000
BC2 to BC0
[2] Set MST

Figure 16.16 Operation Timing For Receiving One Byte

Rev. 4.00 Sep. 14, 2005 Page 500 of 982
REJ09B0023-0400
1 2
Bit 6
Bit 0 Bit 1
Data 1

Figure 16.15 Receive Mode Operation Timing

1 2 3
Bit 0 Bit 1 Bit 2
111 110 101
[3] Set the RCVD bit after checking if BSC2 = 1
7 8 1
Bit 7 Bit 0
Data 2
Data 1
[3] Read ICDRR
4 5 6
Bit 3 Bit 4 Bit 5 Bit 6
100 011 010
7 8 1
Bit 6 Bit 7 Bit 0
[3] Read ICDRR
7 8
Bit 7
001 000
2
Bit 1
Data 3
Data 2