Input/Output Pins; Table 6.2 Pin Configuration - Renesas HD6417641 Hardware Manual

• Manual-on reset
1. A low signal is input to the RESETM pin.
2. The WDT counter overflows if WDT starts counting while the WT/IT and RSTS bits of the
WTCSR are set to 1.
6.1.3

Input/Output Pins

Table 6.2 lists the pins used for the power-down modes.
Table 6.2 Pin Configuration
Pin Name
Processing state 1
Processing state 0
Power-on reset
Manual reset
Note: H and L indicate high and low levels, respectively. STATUS1 and STATUS0 indicate the pin
status in this order. To use this pin as the STATUS pin, a PFC setting is required. For
details on this, see section 22, Pin Function Controller (PFC).
Symbol I/O
STATUS1 Output Indicates the operational state of this LSI.
STATUS0
RESETP Input
RESETM Input
Description
HH: Manual reset
HL: Sleep mode
LH: Standby mode
LL: Normal operation
Inputting low level signal to this pin cause a transition
to power-on reset processing.
Inputting low level signal to this pin cause a transition
to manual reset processing.
Rev. 4.00 Sep. 14, 2005 Page 165 of 982
Section 6 Power-Down Modes
REJ09B0023-0400