Block Diagram; Pin Configuration; Figure 20.1 Block Diagram Of Usb; Table 20.1 Pin Configuration And Functions - Renesas HD6417641 Hardware Manual

Section 20 USB Function Module
• Power mode: Self-powered, bus-powered
20.1.1

Block Diagram

Interrupt requests
DMA transfer requests
Clock (48 MHz)
UDC: USB device controller
20.2

Pin Configuration

Table 20.1 Pin Configuration and Functions

Pin Name I/O
XVDATA Input
DPLS Input
DMNS Input
TXDPLS Output
TXDMNS Output
TXENL Output
VBUS Input
SUSPND Output
UCLK Input
DP I/O
DM I/O
Rev. 4.00 Sep. 14, 2005 Page 748 of 982
REJ09B0023-0400
Internal
peripheral bus
Status
and control
registers
FIFO
(288 bytes)

Figure 20.1 Block Diagram of USB

Function
Input pin for receive data from differential receiver
Input pin to driver for D+ signal from receiver
Input pin to driver for D– signal from receiver
D+ transmit output pin to driver
D– transmit output pin to driver
Driver output enable pin
USB cable connection monitor pin
Transceiver suspend state output pin
USB clock input pin (48 MHz input)
On-chip transceiver D + signal
On-chip transceiver D - signal
USB function module
UDC To transceiver
XVEROFF Conditions
1
1
1
1
1
1
1/0
1/0
1/0
0
0