Input/Output Pins; Table 12.1 Pin Configuration - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 12 Bus State Controller (BSC)
12.2

Input/Output Pins

Table 12.1 shows pin configuration of the BSC.

Table 12.1 Pin Configuration

Name
A25 to A0
D31 to D0
BS
CS0, CS2 to CS4
CS5A
RD/WR
RD
WE3/ICIOWR/AH
WE2/ICIRD
WE1/WE
Rev. 4.00 Sep. 14, 2005 Page 272 of 982
REJ09B0023-0400
I/O
Function
Output
Address bus
I/O
Data bus
Output
Bus cycle start
Output
Chip select
Output
Chip select
Active only for address map 1
Output
Read/write
Connects to WE pins when SDRAM or byte-selection SRAM is
connected.
Output
Read pulse signal (read data output enable signal)
Output
Indicates that D31 to D24 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the address hold signal when the MPX-IO is used.
Functions as the selection signals for D31 to D24 when SDRAM is
connected.
Output
Indicates that D23 to D16 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the selection signals for D23 to D16 when SDRAM is
connected.
Output
Indicates that D15 to D8 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the selection signals for D15 to D8 when SDRAM is
connected.

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