Table 2.23 Branch Instructions - Renesas HD6417641 Hardware Manual

Branch Instructions

Table 2.23 Branch Instructions

Instruction Instruction Code
BF label 10001011dddddddd
BF/S label 10001111dddddddd
BT label 10001001dddddddd
BT/S label 10001101dddddddd
BRA label 1010dddddddddddd
BRAF Rm 0000mmmm00100011
BSR label 1011dddddddddddd
BSRF Rm 0000mmmm00000011
JMP @Rm 0100mmmm00101011
JSR @Rm 0100mmmm00001011
RTS 0000000000001011
Note: One state when the branch is not executed.
*
Operation
If T = 0, disp × 2 + PC → PC;
if T = 1, nop (where label is
disp + PC)
Delayed branch, if T = 0,
disp × 2 + PC → PC;
if T = 1, nop
Delayed branch, if T = 1,
disp × 2 + PC → PC;
if T = 0, nop
If T = 1, disp × 2 + PC → PC;
if T = 0, nop
Delayed branch,
disp × 2 + PC → PC
Delayed branch,
Rm + PC → PC
Delayed branch, PC → PR,
disp × 2 + PC → PC
Delayed branch, PC → PR,
Rm + PC → PC
Delayed branch, Rm → PC
Delayed branch, PC → PR,
Rm → PC
Delayed branch, PR → PC
Rev. 4.00 Sep. 14, 2005 Page 77 of 982
Section 2 CPU
Execution
States T Bit
3/1* —
2/1* —
3/1* —
2/1* —
2 —
2 —
2 —
2 —
2 —
2 —
2 —
REJ09B0023-0400