Figure 2.5 Control Registers (2) - Renesas HD6417641 Hardware Manual

Section 2 CPU
31
31
31
31
31
31
31
MOD
ME: Modulo end address, MS: Modulo start address
Saved status register (SSR)
Stores current SR value at time of exception to indicate processor status when returning to instruction stream from
exception handler.
Saved program counter (SPC)
Stores current PC value at time of exception to indicate return address on completion of exception handling.
Global base register (GBR)
Stores base address of GBR-indirect addressing mode. The GBR-indirect addressing mode is used for data transfer
and logical operations on the on-chip peripheral module register area.
Vector base register (VBR)
Stores base address of exception vector area.
Repeat start register (RS)
Used in DSP mode only. Indicates start address of repeat loop.
Repeat end register (RE)
Used in DSP mode only. Indicates address of repeat loop end.
Modulo register (MOD)
Used in DSP mode only.
MD[31:16]: ME: Modulo end address, MD[15:0]: Modulo start address.
In X/Y operand address generation, the CPU compares the address with ME, and if it is the same, loads MS in either
the X or Y operand address register (depending on bits DMX and DMY in the SR register).
Rev. 4.00 Sep. 14, 2005 Page 34 of 982
REJ09B0023-0400
SSR
SPC
GBR
VBR
RS
RE
16 15
ME

Figure 2.5 Control Registers (2)

0
Saved status register (SSR)
0
Saved program counter (SPC)
0
Global base register
0
Vector base register
0
Repeat start register
0
Repeat end register
0
MS Modulo register