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Register Name
Port J control register
Port E I/O register
Port E MTU R/W enable register
—
Port A data register
Port B data register
Port C data register
Port D data register
Port E data register
Port F data register
Port G data register
Port H data register
Port J data register
Notes: 1.
This register only accepts 16-bit writing to prevent incorrect writing. In this case, the
upper eight bits of the data must be H'5A, otherwise writing cannot be performed.
When reading, read from the same address in bytes.
2.
This register only accepts 16-bit writing to prevent incorrect writing. In this case, the
upper eight bits of the data must be H'A5, otherwise writing cannot be performed.
When reading, read from the same address in bytes.
3.
This register only accepts 32-bit writing to prevent incorrect writing. In this case, the
upper 16 bits of the data must be H'A55A, otherwise writing cannot be performed.
When reading, read from the same address in unit of 32 bits. At this time, the upper 16
bits are read as 0s.
Abbreviation
Bit No.
PJCR
32
PEIOR
16
PEMTURWER
16
—
—
PADR
16
PBDR
16
PCDR
16
PDDR
16
PEDR
16
PFDR
16
PGDR
16
PHDR
16
PJDR
16
Section 24 List of Registers
Address
Module
H'A443 0020
PFC
H'A443 0038
H'A443 003A
—
—
H'A443 0026
PORT
H'A443 0028
H'A443 002A
H'A443 002C
H'A443 002E
H'A443 0030
H'A443 0032
H'A443 0034
H'A443 0036
Rev. 4.00 Sep. 14, 2005 Page 875 of 982
Access States
8/16/32
8/16
8/16
—
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
REJ09B0023-0400
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