Section 5 Watchdog Timer (Wdt); Features - Renesas HD6417641 Hardware Manual

32-bit risc microcomputer superh risc engine family / sh7641 series
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Section 5 Watchdog Timer (WDT)

This LSI includes the watchdog timer (WDT), which enables reset the LSI on overflow of the
counter when the value of the counter has not been updated because of a system malfunction.
The WDT is a single channel timer that counts up the clock-settling period when the system leaves
standby mode or the temporary periods on standby that occur when the clock frequency is
changed. It can also be used as a watchdog timer or interval timer.
5.1

Features

The WDT has the following features:
• Can be used to ensure the clock settling time: The WDT is used in leaving standby mode or the
temporary periods on standby that occur when the clock frequency is changed.
• Can switch between watchdog timer mode and interval timer mode.
• Generates internal resets in watchdog timer mode: Internal resets occur after counter overflow.
Power-on reset or manual reset can be selected as a reset.
• Interrupt generation in interval timer mode
An interval timer interrupt is generated when the counter overflows.
• Choice of eight counter input clocks
Eight clocks (×1 to ×1/4096) that are obtained by dividing the peripheral clock can be selected.
Section 5 Watchdog Timer (WDT)
Rev. 4.00 Sep. 14, 2005 Page 155 of 982
REJ09B0023-0400

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