Boundary Scan Description Language - Renesas M32R/ECU Series User Manual

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19.5 Boundary Scan Description Language

The Boundary Scan Description Language (abbreviated BSDL) is stipulated in the supplements to the Standard
Test Access Port and Boundary-Scan Architecture of IEEE 1149.1-1990 and IEEE 1149.1a-1993. BSDL is a
subset of IEEE 1076-1993 Standard VHSIC Hardware Description Language (VHDL). BSDL allows to precisely
describe the functions of conforming components to be tested. For package connection test, this language is
used by Automated Test Pattern Generation tools, and for synthesized test logic and verification, this language
is used by Electronic Design Automation tools. BSDL provides powerful extended functions usable in internal
test generation and necessary to write hardware debug and diagnostics software.
The primary section of BSDL has statements of logical port description, physical pin map, instruction set and
boundary register description.
• Logical port description
The logical port description assigns meaningful symbol names to each pin on the chip. The logic type of each
pin, whether input, output, input/output, buffer or link, that defines the logical direction of signal flow is deter-
mined here.
• Physical pin map
The physical pin map correlates the chip's logical ports to the physical pins on each package. By using
separate names for each map, it is possible to define two or more physical pin maps in one BSDL description.
• Instruction set statement
The instruction set statement writes bit patterns to be shifted in into the ship's instruction register. This bit
pattern is necessary to place the chip into each test mode defined in standards. Instructions exclusive to the
chip can also be written.
• Boundary register description
The boundary register description is a list of boundary register cells or shift stages. Each cell is assigned a
separate number. The cell with number 0 is located nearest to the test data output (JTDO) pin, and the cell
with the largest number is located nearest to the test data input (JTDI) pin. Cells also contain related other
information which includes cell type, logical port corresponding to the cell, logical function of the cell, safety
value, control cell number, disable value and result value.
Note: • The Boundary Scan Description Language (BSDL) will be made available after mass-production
from the Mitsubishi Microcomputer Technology Home Page for the M32R family application
technology data. The URL of this home page is given below.
• http://www.infomicom.maec.co.jp/
19.5 Boundary Scan Description Language
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32180 Group User's Manual (Rev.1.0)