Table of Contents
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3.1.5
Shift Operations .................................................................................................... 109
3.1.6
Most Significant Bit Detection Operation ............................................................ 112
3.1.7
Rounding Operation.............................................................................................. 115
3.1.8
Overflow Protection.............................................................................................. 117
3.1.9
Data Transfer Operation ....................................................................................... 118
3.1.10 Local Data Move Instruction ................................................................................ 122
3.1.11 Operand Conflict .................................................................................................. 123
3.2
DSP Addressing................................................................................................................. 124
3.2.1
DSP Repeat Control.............................................................................................. 124
3.2.2
DSP Data Addressing ........................................................................................... 132
Section 4 Clock Pulse Generator (CPG) ........................................................... 143
4.1
Features.............................................................................................................................. 143
4.2
Input/Output Pins............................................................................................................... 146
4.3
Clock Operating Modes ..................................................................................................... 146
4.4
Register Descriptions......................................................................................................... 149
4.4.1
Frequency Control Register (FRQCR) ................................................................. 149
4.5
Changing the Frequency .................................................................................................... 151
4.5.1
Changing the Multiplication Rate......................................................................... 151
4.5.2
Changing the Division Ratio................................................................................. 151
4.6
Notes on Board Design ...................................................................................................... 152
Section 5 Watchdog Timer (WDT) ................................................................... 155
5.1
Features.............................................................................................................................. 155
5.2
Register Descriptions......................................................................................................... 156
5.2.1
Watchdog Timer Counter (WTCNT).................................................................... 156
5.2.2
Watchdog Timer Control/Status Register (WTCSR)............................................ 157
5.2.3
Notes on Register Access ..................................................................................... 159
5.3
Use of the WDT................................................................................................................. 159
5.3.1
Canceling Standbys .............................................................................................. 159
5.3.2
Changing the Frequency ....................................................................................... 160
5.3.3
Using Watchdog Timer Mode .............................................................................. 160
5.3.4
Using Interval Timer Mode .................................................................................. 161
5.4
Precautions to Take when Using the WDT........................................................................ 161
Section 6 Power-Down Modes.......................................................................... 163
6.1
Features.............................................................................................................................. 163
6.1.1
Power-Down Modes ............................................................................................. 163
6.1.2
Reset ..................................................................................................................... 164
6.1.3
Input/Output Pins.................................................................................................. 165
Rev. 4.00 Sep. 14, 2005 Page xiv of l
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