Section 4 Clock Pulse Generator (CPG)
Section 5 Watchdog Timer (WDT)
Section 6 Power-Down Modes
Section 7 Cache
Figure 7.1 Cache Structure ......................................................................................................... 180
Section 8 X/Y Memory
Section 9 Exception Handling
Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page xxx of l