Ethernet Mac Management Receive Data (Macmrxd) Register; Ethernet Mac Number Of Packets (Macnp) Register; Ethernet Mac Management Receive Data (Macmrxd) Register Field Descriptions; Ethernet Mac Number Of Packets (Macnp) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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19.6.13 Ethernet MAC Management Receive Data (MACMRXD) Register, offset 0x030
The Ethernet MAC Management Receive Data (MACMRXD) register holds the last value read from the
MII Management registers.
Figure 19-17. Ethernet MAC Management Receive Data (MACMRXD) Register
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-16. Ethernet MAC Management Receive Data (MACMRXD) Register Field Descriptions
Bit Field
31-16 Reserved
15-0 MDRX
19.6.14 Ethernet MAC Number of Packets (MACNP) Register, offset 0x034
The Ethernet MAC Number of Packets (MACNP) register holds the number of frames that are currently in
the RX FIFO. When NPR is 0, there are no frames in the RX FIFO, and the RXINT bit is clear. When NPR
is any other value, at least one frame is in the RX FIFO, and the RXINT bit in the MACRIS register is set.
NOTE: The FCS bytes are not included in the NPR value. As a result, the NPR value could be zero
before the FCS bytes are read from the FIFO. In addition, a new packet could be received
before the NPR value reaches zero. To ensure that the entire packet is received, either use
the DriverLib EthernetPacketGet() API or compare the number of bytes received to the
Length field from the frame to determine when the packet has been completely read.
Figure 19-18. Ethernet MAC Number of Packets (MACNP) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-17. Ethernet MAC Number of Packets (MACNP) Register Field Descriptions
Bit Field
31-6 Reserved
5-0 NPR
SPRUHE8E – October 2012 – Revised November 2019
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R-0
Value Description
Reserved
MII Register Recieve Data
0000h The MDRX bits represent the data to be written in the previous MII management transaction
Reserved
R-0
Value Description
Reserved
Number of Packets in Receive FIFO
00h The NPR bits represent the number of packets stored in the RX FIFO. While the NPR field is
greater than 0, the RXINT interrupt in the MACRIS register is set.
Copyright © 2012–2019, Texas Instruments Incorporated
16 15
M3 Ethernet Media Access Controller (EMAC)
Ethernet MAC Register Descriptions
MDRX
R/W-0
6 5
NPR
R-0
0
0
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