The receive DMA can also be used for pass-through transfers by writing to
the transmit register of another channel. The DMA also takes care to
transfer data only when the transmit register of the target link is free.
Interrupts
If the receive link DMA channel has not been initialized, the link port
interrupt is issued by the link receiver when a quad-word received by the
link is waiting in the
this link receive channel then becomes active after the interrupt is issued,
the interrupt goes off and a DMA request is issued. Since the link inter-
rupt is a level-triggered interrupt, it is ignored.
The interrupt can be used for two purposes:
• As an error indication when the system designer intends to manage
the data by using the DMA.
• For control indication between different TigerSHARC processors.
The link interrupt routine can read the link receiver buffer, analyze
it, and behave accordingly. For more information, see "Link Port
DMA Control" on page 7-32.
Reset and Boot
The link ports can also be used for boot. After reset, all link ports are ini-
tialized to receive mode. The link receive DMA channel is initialized to
receive 256 words and write them to internal memory block 0, address 0.
For more information, see "Boot Link to Internal Memory" on
page 10-36.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
register. If the DMA channel associated with
LBUFRx
Link Ports
8-7
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