Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 21

• "Cluster Bus"
This chapter focuses on the external bus interface of the Tiger-
SHARC processor, which includes the bus arbitration logic and the
external address, data and control buses.
• "SDRAM Interface"
This chapter describes TigerSHARC interface to SDRAM devices,
including programming issues and the SDRAM controller.
• "Direct Memory Access"
This chapter describes how the TigerSHARC processor's on-chip
DMA controller acts as a machine for transferring data without
core interruption.
• "Link Ports"
This chapter describes how link ports provide point-to-point com-
munications between TigerSHARC processors in a system. The
Link ports can also be used to interface with any other device that
is designed to work in the same protocol.
• "Debug Functionality"
This chapter describes features of the TigerSHARC processor that
are useful for performing software debugging and services usually
found in Operating System (OS) kernels.
• "System Design"
This chapter describes system features of the TigerSHARC proces-
sor. These include Power, Reset, Clock, JTAG, and Booting, as
well as pin descriptions and other system level information.
This hardware reference is a companion document to the ADSP-TS101
TigerSHARC Processor Programming Reference.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Preface
xxi