Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 341

Table 9-4. JTAG and Emulation I/O Pins
Signal Type
Input
TRST
Asynchronous
Input
TCK
Input
TDI
Output
TDO
Input
TMS
Output
EMU
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Description
Test Reset (JTAG)
Resets the test state machine. The
power up to ensure proper JTAG operation. The
KΩ internal pull-up resistor.
Test Clock (JTAG)
Provides an asynchronous clock for JTAG boundary scan.
Test Data Input (JTAG)
A serial data input of the boundary scan path. This signal has a 100 KΩ
internal pull-up resistor.
Test Data Output (JTAG)
A serial data output of the boundary scan path.
Test Mode Select (JTAG)
Controls the test state machine. This signal has a 100 KΩ internal
pull-up resistor.
Emulation
Connected to the ADSP-TS101 DSP EZ-ICE target board connector
only.
Debug Functionality
signal must be asserted after
TRST
signal has a 100
TRST
9-13