Debug Register Groups - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

Table 2-10. Interrupt Vector Table (IVT) for Group 0x39
Register Name Register Type
DMA #11 Reg
IVDMA11
DMA #12 Reg
IVDMA12
DMA #13 Reg
IVDMA13
IRQ0 Reg pin
IVIRQ0
IRQ1 Reg pin
IVIRQ1
IRQ2 Reg pin
IVIRQ2
IRQ3 Reg pin
IVIRQ3
VIRPT (vector Reg)
VIRPT
Bus lock vector
IVBUSLK
Timer 0 high priority 0x180734
IVTIMER0HP
Timer 1 high priority 0x180735
IVTIMER1HP
Hardware error
IVHW
Software exception
IVSW

Debug Register Groups

The debug registers use groups 0x3D, 0x3E, and 0x1B. These register
groups are described in Table 2-11 on page 2-22 through Table 2-13 on
page 2-23. The debug registers can only be accessed as single-word
registers.
In emulation mode the debug registers can be accessed only by move,
register-to-register, or immediate data load instructions. These registers
cannot be loaded from or stored to memory directly.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Memory and Register Map
Direct Memory Address Reset Value
0x180720
0x180725
0x180726
0x180729
0x18072A
0x18072B
0x18072C
0x180730
0x180732
0x180739
0x18073E
0x0
0x0
0x0
0x1000 0000
0x0800 0000
0x0C0 0000
0x0
2-21