Table of Contents
Advertisement
Register Access Features
The Control register shown in Table 2-19 on page 2-46 has three
addresses:
•
Regular address – read and write
DCNT
The initial value of the
•
DCNTST
old value is OR'ed with the data written into it. Therefore to set a
bit, write a "1" logic value to the desired bit location. To leave the
bit value intact, write a logic "0".
•
DCNTCL
ter's old value is AND'ed with the data written into it. Therefore,
to clear a specific bit, write a logic "0" to the desired bit location.
To retain the bit's original value, write a logic "1".
See "Direct Memory Access" on page 7-1 for complete DMA register
definitions.
2-42
DCNT
Set bits – write. When writing to this address, the register's
Clear bits – write. When writing to this address, the regis-
after reset is 0x0.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Advertisement
Table of Contents
