Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 315

A token switch is the exchange between the transmitter (master) and the
receiver (slave) roles. Only the transmitter can enable the token switch.
The transmitter enables a token switch in one of these two cases:
• No more data to transmit
• If the
PSIZE
transmitting 64 quad-words
Figure 8-8 shows an example of a token switch. In this case, the
names are shown from the first transmitter's point of view (TigerSHARC
processor A). The transmitter indicates transmission completion by setting
the high at the end of the last quad-word transmission.
LxCLKOUT
When TigerSHARC processor B (the receiver) senses that its input
(which is connected to
LxCLKIN
high for the period between one and two
token switch by setting
defined by the link clock divisor and
The token is switched if
ing the former transmitter (A in this example) did not regret the token
switch and can receive data. (Refer to the ADSP-TS101 TigerSHARC
Embedded Processor Data Sheet.)
The link has an output
high, the link data pins direction is output. The
the transmitter enables a token switch. The
token switch, when the data is transmitted—the high value does not over-
lap. This control can be used by any type of bidirectional buffers on the
data lines.
The former transmitter can regret the token switch if it gets more data to
transmit after a pause, and if the former receiver has not yet requested a
token switch.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
bit in is cleared (64 quads packet size), after
LCTLx
LxCLKOUT
output low. The
LxCLKOUT
CCLK
remains high long enough, thus indicat-
LxCLKOUT
that indicates data direction. When
LxDIR
of TigerSHARC processor A) is
cycles, it can request a
LxCLK
cycle period is
LxCLK
.
pin is cleared when
LxDIR
pin is set after the
LxDIR
Link Ports
LxCLK
is
LxDIR
8-13