Core Controls; Clock Inputs - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

3 CORE CONTROLS

This chapter discusses clocking inputs, TigerSHARC processor's three
operating modes (and low power mode), and the boot modes that initiate
the TigerSHARC processor. The chapter also includes a discussion of Flag
and Timer pins.
The operating modes are:
• Emulation mode
• Supervisor mode
• User mode
The boot modes are:
• EPROM boot
• Link boot
• Boot by other master
• No boot

Clock Inputs

The TigerSHARC processor has two primary clock inputs—local clock
( ) and system clock (
LCLK
(tie the
SCLK_P
ADSP-TS101 TigerSHARC Processor
Hardware Reference
). These clocks must receive the same input
SCLK
and pins together). These clock signals can be the
LCLK_P
3-1