Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 269

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The data transferred may be a normal, long, or quad-word. This is speci-
fied in the
LEN
on page 7-18.) The
port channel's
After each data transfer to or from internal memory, the DMA controller
adds the modify value to the Index register to generate the address for the
next DMA transfer. The modify value is added to the index value and
written back into the Index register. The modify value in the X modify
field in the
TCB
ments and decrements. Similarly the Y modify field in the TCB register
DY is a 16-bit signed integer. The 16 bits are sign-extended when used
with the 32-bit Index register.
!
If the Index register is modified out of the address range of an exist-
ing memory allocation or changes range between internal and
external memory space, results are unpredictable.
Each DMA channel has a Count register (the X count field in the
ister
) that has to be initialized with the number of words to be
DX
transferred, regardless of the data item length (32, 64 or 128 bits). The
count register is decremented after each DMA transfer on that channel.
The decrement value is 1, 2, or 4 depending on the normal, long, or
quad-word access specified. When the count reaches zero, the DMA is
complete, and the interrupt for that channel can be generated.
"
If the X count field in the
DMA transfers on that channel are not disabled. Moreover, 2
transfers are performed. This occurs because the first transfer is ini-
tiated before the count value is tested. The correct way to disable a
DMA channel is to clear its DMA enable bit in the corresponding
control register.
Each DMA channel
register
. The chain pointer is used in chained DMA operations. (See
DP
"DMA Chaining" on page 7-41.)
ADSP-TS101 TigerSHARC Processor
Hardware Reference
field of the
control register
TCB
field must be unique per channel. (Both external
LEN
s must have the same
TCB
register
is a 16-bit signed integer, allowing both incre-
DX
also has a chain pointer—the
TCB
Direct Memory Access
DPx.
value.)
LEN
register
is initialized with zero,
TCB
DX
(See "DPx Register"
TCB
16
field in the
CHPT
7-35
reg-
TCB

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