FLUSH PIPE
ABORT INTERRUPT
Figure 4-1. Hardware Interrupts
ADSP-TS101 TigerSHARC Processor
Hardware Reference
NO
1
ENABLED
IMASK[60]
AND IMASK[N]
AND PMASK_R[N]
AND NOT PMASK[60]
YES
2
INSERT ISR FETCH ADDRESS
STORE PC IN RETI
EXECUTE INSTRUCTIONS IN PIPE
3
ISR@EX2
NO
IS IMASK[60]
AND NOT PMASK[60]
YES
4
ILAT[N] CLEARED
PMASK[N] SET
PMASK[60] SET
5
IF NESTING:
STORE CONTEXT
STORE RETIB:
CLEARS PMASK[60]
YES
HW INTERRUPT
ILAT[N] SET
Interrupts
NO
8
PMASK[N] CLEARED
PMASK[60] CLEARED
JUMP TO RETI
7
RESTORE RETIB:
SETS PMASK[60]
RESTORE CONTEXT
RTI
6
EXECUTE ISR
4-17
Need help?
Do you have a question about the ADSP-TS101 TigerSHARC and is the answer not in the manual?
Questions and answers