Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 7

Watchpoint Status - WP0STAT, WP1STAT and WP2STAT 2-27
Cycle Counters - CCNT0 and CCNT1 ............................ 2-29
Trace Buffer - TRCB0 to TRCB7 and TRCBPTR ............. 2-29
Watchpoint Address Pointers - WP0L, WP1L, WP2L, WP0H,
WP1H and WP2H ......................................................... 2-29
External Port Registers ........................................................... 2-30
Bus Control/Status (BIU) Register Group .......................... 2-30
SYSTAT/SYSTATCL Register ........................................ 2-31
SYSCON Register (DMA 0x180480) ............................ 2-34
SDRCON (SDRAM Configuration) (DMA 0x180484) . 2-36
BUSLK System Control ................................................ 2-38
BMAX Current Value .................................................... 2-39
BMAX Register ............................................................. 2-39
External Port Configuration and Status Registers ............... 2-41
DMA Registers ................................................................. 2-41
External Port DMA Register .......................................... 2-43
AutoDMA Registers ...................................................... 2-43
AutoDMA0 Register ..................................................... 2-44
AutoDMA1Register ...................................................... 2-44
Link Port Transmit DMA Register ................................. 2-45
Link Port Receive DMA Register ................................... 2-45
DMA Control and Status Register ................................. 2-46
Link Registers ................................................................... 2-47
Link Port Control and Status Register ............................ 2-47
Link Port Receive and Transmit Buffers ......................... 2-48
ADSP-TS101 TigerSHARC Processor
Hardware Reference
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