Table 8-1. Link I/O Pins
Signal
Type
Input
LxCLKIN
Output Clock when link port x transmits.
LxCLKOUT
I/O
LxDAT7–0
Output Indicates whether link port x is transmitting or receiving.
LxDIR
Link ports should be connected as shown in Figure 8-2. The minimal sys-
tem only uses the
each TigerSHARC processor is connected to the
The
bus is connected between the two TigerSHARC processors.
LxDAT
LxCLKIN
LxCLKOUT
LxDAT
LINK PORT 0
Figure 8-2. Minimal Link Configuration – No Buffering
An optional system is shown in Figure 8-3. This configuration uses the
pin in addition to the
LxDIR
figuration might be used when differential low swing buffers are used for
long twisted-wire pairs. The figure shows a set of bidirectional buffers
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Description
Clock when link port x receives.
Acknowledge when link port x transmits.
Acknowledge when link port x receives.
Data input and output for link port x.
1 link port x is the output
0 link port x is the input
,
LxCLKIN
LxCLKOUT
8
LxCLKIN
, and
pins. The
LxDAT
LxCLKIN
,
, and
LxCLKOUT
LxDAT
Link Ports
pin of
LxCLKOUT
of the other.
LxCLKIN
LxCLKOUT
LxDAT
LINK PORT 1
pins. This con-
8-3
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